Application module: Design specific assignment to interconnect usage view | ISO/TS 10303-1663:2014-02(E) © ISO |
This clause specifies the information requirements for the Design specific assignment to interconnect usage view application module. The information requirements are specified as the Application Reference Model (ARM) of this application module.
NOTE 1 A graphical representation of the information requirements is given in Annex C.
NOTE 2 The mapping specification is specified in 5.1. It shows how the information requirements are met by using common resources and constructs defined or imported in the MIM schema of this application module.
This clause defines the information requirements to which implementations shall conform using the EXPRESS language as defined in ISO 10303-11. The following begins the Design_specific_assignment_to_interconnect_usage_view_arm schema and identifies the necessary external references.
EXPRESS specification:
*)
SCHEMA Design_specific_assignment_to_interconnect_usage_view_arm;
(*
The following EXPRESS interface statement specifies the elements imported from the ARM of another application module.
EXPRESS specification:
*)
USE FROM
Fabrication_joint_arm;
--
ISO/TS 10303-1668
(*
NOTE 1 The schemas referenced above are specified in the following part of ISO 10303:
Fabrication_joint_arm ISO/TS 10303-1668
NOTE 2 See Annex C, Figures C.1and C.2 for a graphical representation of this schema.
This subclause specifies the ARM type for this application module. The ARM type and definition is specified below.
The interconnect_or_assembly_module_select type allows for the designation of the data types Component_termination_passage_interface_terminal, Printed_connector_component_interface_terminal and Land_interface_terminal.
EXPRESS specification:
*)
TYPE
interconnect_or_assembly_module_select =
SELECT
(Component_termination_passage_interface_terminal,
Printed_connector_component_interface_terminal,
Land_interface_terminal);
END_TYPE;
(*
This subclause specifies the ARM entities for this module. Each ARM application entity is an atomic element that embodies a unique application concept and contains attributes specifying the data elements of the entity. The ARM entities and definitions are specified below.
EXPRESS specification:
*)
ENTITY Component_terminal_to_interconnect_module_interface_terminal_assignment
SUBTYPE OF (Component_feature_to_physical_usage_view_assignment);
SELF\Component_feature_to_physical_usage_view_assignment.defined_part_feature RENAMED usage_view_terminal : Interconnect_module_interface_terminal;
SELF\Component_feature_to_physical_usage_view_assignment.assigned_design_object RENAMED assigned_terminal : interconnect_or_assembly_module_select;
END_ENTITY;
(*
Attribute definitions:
usage_view_terminal: specifies a role of the Interconnect_module_interface_terminal for the Component_terminal_to_interconnect_module_interface_terminal_assignment.
assigned_terminal: specifies the interconnect_or_assembly_module_select for the Component_terminal_to_interconnect_module_interface_terminal_assignment.
A Component_terminal_to_interconnect_module_macro_terminal_assignment is a type of Component_feature_to_physical_usage_view_assignment.
EXPRESS specification:
*)
ENTITY Component_terminal_to_interconnect_module_macro_terminal_assignment
SUBTYPE OF (Component_feature_to_physical_usage_view_assignment);
SELF\Component_feature_to_physical_usage_view_assignment.defined_part_feature RENAMED usage_view_terminal : Interconnect_module_macro_terminal;
SELF\Component_feature_to_physical_usage_view_assignment.assigned_design_object RENAMED assigned_terminal : fabricated_feature_select;
END_ENTITY;
(*
Attribute definitions:
usage_view_terminal: specifies the Interconnect_module_macro_terminal for the Component_terminal_to_interconnect_module_macro_terminal_assignment.
assigned_terminal: specifies the fabricated_feature_select for the Component_terminal_to_interconnect_module_macro_terminal_assignment.
A Stratum_concept_to_physical_usage_view_assignment is the relationship between a Part_feature and any one of the stratum_concept for the purpose of traceability between the Part_feature and the underlying design feature. The semantics of the assigned_design_object and the defined_part_feature shall be compatible.
EXAMPLE It is inappropriate to assign a Stratum_feature as an assigned_design_object and an Interconnect_module_cutout_surface as a defined_part_feature with a member of Stratum_concept_to_physical_usage_view_assignment.
EXPRESS specification:
*)
ENTITY Stratum_concept_to_physical_usage_view_assignment;
assigned_design_object : stratum_concept;
defined_part_feature : Part_feature;
purpose :
OPTIONAL
STRING;
UNIQUE
UR1: defined_part_feature;
WHERE
WR1: NOT ('DESIGN_SPECIFIC_ASSIGNMENT_TO_INTERCONNECT_USAGE_VIEW_ARM.INTERCONNECT_MODULE_TERMINAL' IN TYPEOF(defined_part_feature));
END_ENTITY;
(*
Attribute definitions:
assigned_design_object: specifies any one of the stratum_concept as the assigned object for the Stratum_concept_to_physical_usage_view_assignment.
defined_part_feature: specifies a role of the Part_feature for the Stratum_concept_to_physical_usage_view_assignment.
purpose: the text that specifies a purpose. The value of this attribute need not be specified.
Formal propositions:
UR1: The defined_part_feature shall be unique within a population of Stratum_concept_to_physical_usage_view_assignment.
WR1: The defined_part_feature shall not be Interconnect_module_terminal.
This subclause specifies the ARM subtype constraint for this module. The subtype constraint places a constraint on the possible super-type / subtype instantiations. The ARM subtype constraint and definition is specified below.
The dsatiuv_component_feature_to_physical_usage_view_assignment_subtypes constraint specifies a constraint that applies to instances of subtypes of Component_feature_to_physical_usage_view_assignment.
EXPRESS specification:
*)
SUBTYPE_CONSTRAINT dsatiuv_component_feature_to_physical_usage_view_assignment_subtypes FOR Component_feature_to_physical_usage_view_assignment;
ONEOF (Component_terminal_to_interconnect_module_macro_terminal_assignment,
Component_terminal_to_interconnect_module_interface_terminal_assignment);
END_SUBTYPE_CONSTRAINT;
(*
*)
END_SCHEMA; -- Design_specific_assignment_to_interconnect_usage_view_arm
(*
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